Linus Torvalds, the daddy of Linux, might be some of the expressive tech bosses on the market, and his takes are virtually all the time very fascinating whether or not you agree with them or not.

Whereas discussing adjustments and additions to the brand new Linux KConfig (kernel configuration) construct, Torvalds expressed his annoyance and disapproval of the AMD64 or x86_64 structure characteristic ranges. He wrote:

On second thought , let’s not go to x86-64 microarchitectural ranges. ‘Tis a foolish place”

The entire “v2”, “v3”, “v4” and many others naming appears to be some loopy glibc artifact and is silly and must die.

It has no relevance to something. Please do *not* introduce that mind-fart into the kernel sources.

I don’t know who got here up with the “microarchitecture ranges” rubbish, however so far as I can inform, it is totally unofficial, and it is a fully damaged mannequin.

There’s a very actual mannequin for microarchitectural options, and it is the CPUID bits. Making an attempt to linearize these bits is technically incorrect, since this stuff merely aren’t some form of linear development.

And worse, it is a “simplification” that actually provides complexity. Now as a substitute of asking “does this CPU assist the cmpxchgb16 instruction?”, the query as a substitute turns into one among “what the hell does ‘v3’ imply once more?”

So no. We’re *NOT* introducing that idiocy within the kernel.

Linus

For these questioning, these x86-64 microarchitecture ranges have been launched again in 2020 by Purple Hat’s Florian Weimer. Initially, “Ranges A, B, and C,” have been proposed, and later “Stage D” was added too.

What these ranges basically do is classify CPU options in a temporal/chronological method in an try to make it less complicated to enhance {hardware} and OS/software program compatibility and synergy for higher compilation optimizations:

• x86-64-v2 brings assist (amongst different issues) for vector directions as much as Streaming SIMD Extensions 4.2 (SSE4.2) and Supplemental Streaming SIMD Extensions 3 (SSSE3), the POPCNT instruction (helpful for knowledge evaluation and bit-fiddling in some knowledge buildings), and CMPXCHG16B (a two-word compare-and-swap instruction helpful for concurrent algorithms).
• x86-64-v3 provides vector directions as much as AVX2, MOVBE (for big-endian knowledge entry), and extra bit-manipulation directions.
• x86-64-v4 contains vector directions from a few of the AVX-512 variants.

Linus Torvalds feels these structure ranges make issues extra convoluted slightly than simplifying the matter as linearizing the development of {hardware} directions and options shouldn’t be a practical strategy.

Right here, Torvalds does make sense on condition that we regularly discover that sure CPU directions, like say AVX, could also be current in some processor household however it goes away afterward. A current instance is Intel introducing AVX-512 in eleventh Gen Rocket Lake after which eradicating it later in succeeding generations.

It’s noteworthy right here that Linus Torvalds is now a luminary of the just lately conceived x86 Ecosystem Advisory Group so his enter can actually maintain some weight.